Tell Me About the Project That Just Kicked Off

• What is the project name or internal code so we can reference it consistently?
• What type of product are you building? Options: IoT sensor/node, Wearable, Industrial controller, Consumer electronics, Automotive subsystem, Medical device, Edge compute/gateway, Other
• Where are you in the development cycle right now? Options: Concept/requirements, Prototype, Validation/alpha, Pre‑production/beta, Production
• When is your BOM freeze or component selection deadline? Options: Within 0–3 months, 3–6 months, 6–9 months, 9–12 months, More than 12 months
• How urgent does solving the component question feel to your team right now? Options: Critical—must resolve immediately, High urgency—within weeks, Manageable—within months, Low urgency
• Who on your team will be the primary owner for design decisions (name, role, and best contact)?

Is This Project Quietly Rushing Toward a Brick Wall?

• If your current prototype part becomes unavailable, what is the real downside beyond lead‑time—schedule slips, lost customers, or redesign cost?
• How would you rate the availability risk for your prototyped part right now? Options: Very high (weeks of allocation), Moderate (months), Low, Unknown
• Have you identified second‑source candidates or cross‑vendor alternatives yet? If yes, which ones and why were they not chosen initially?
• How long have allocation or supplier availability issues been impacting your projects? Options: This is the first time, <3 months, 3–12 months, Over 12 months
• How does the allocation risk make you feel about hitting the launch date? Options: Very anxious, Somewhat concerned, Optimistic we can mitigate, Confident
• If allocation forces a redesign, what is the latest milestone you can tolerate that change without missing your delivery date? Options: Before schematic freeze, Before PCB spin, Before firmware integration, Before production validation, Not tolerable

Where the Performance Trade‑offs Actually Live

• Which of these trade‑offs are you secretly willing to sacrifice—power, performance, size, or cost—to keep the schedule? Options: Power budget, Processing performance, Package/size, Unit cost, None—we need all
• What is your target power budget for typical operation (mA or watts and conditions)?
• What minimum processing capability or benchmark must the MCU or module meet (e.g., MIPS, MHz, core architecture, DSP features)?
• Are there strict package or mechanical constraints that rule out common parts (max package size, pin count, lead frame vs. QFN vs. BGA)? Options: <4x4 mm or equivalent, 4x4–7x7 mm range, >7x7 mm acceptable, BGA required, Through‑hole not acceptable, No strict constraint
• What is the target BOM cost for the controller, PMIC, or module (per unit) that keeps your economics intact? Options: <$1, $1–$3, $3–$6, $6–$15, >$15
• Are there specific certifications or regulatory needs that influence part selection (e.g., functional safety, medical, automotive AEC‑Q, wireless approvals)? Options: Automotive AEC‑Q, Medical certifications, Safety/UL, Wireless regulatory (FCC/CE), None, Other

Who's Responsible When Things Break at 9 PM?

• Who on your team will be on‑call for late‑night prototype debugging and who escalates supplier issues?
• Which roles must be involved from our side to make this collaboration successful (firmware, hardware, procurement, QA)? Options: Hardware engineer, Firmware engineer, Test/validation, Procurement/sourcing, QA/regulatory, Product manager
• Who in procurement will own sample requests, cost negotiations, and lead‑time confirmations? Options: Not yet assigned, Procurement manager, Category buyer, Sourcing specialist, Outside purchasing agent
• When do you usually bring procurement into the conversation for a new design? Options: At schematic lock, At PCB spin, Before first proto order, After production validation, Unknown/not defined
• What communication cadence and channels work best for your stakeholders during design‑in (e.g., weekly calls, shared board, Slack, milestone emails)? Options: Weekly sync, Biweekly, Milestone driven, Ad hoc/Slack, Email updates only

What Have You Tried, and What Still Feels Broken?

• Which evaluation kits, reference designs, or vendor app notes have you already tested for this use case?
• When you used those evals, what were the top three technical issues that stopped progress? Options: Power sequencing, Thermal performance, Signal integrity/noise, Lack of firmware drivers, Pinout/package mismatch, Other
• How long have those issues been blocking your team from moving forward? Options: Less than a week, 1–4 weeks, 1–3 months, Over 3 months
• When you reached out to vendor support for those problems, how would you rate responsiveness and effectiveness? Options: Rapid and effective, Responsive but slow to resolve, Unhelpful or no response, Not applicable—we haven’t contacted support
• What would you most want a field application engineer to solve for you in week one of engagement? Options: Get an eval kit working with prototype, Resolve power sequencing, Port basic firmware/drivers, Identify second‑source parts, Produce a short decision report
• Would you prefer we first adapt an existing reference design to your board, or ship a new reference board for direct testing? Options: Adapt existing reference design, Ship new reference board, Do both, Undecided—advise us

Imagine a Version of This Device That Actually Ships

• When you say 'production ready,' what invisible engineering or supplier checks do you assume are already done?
• Which acceptance tests must pass before procurement will place volume orders? Options: Electrical validation, EMC/EMI testing, Thermal cycling, Lifetime/reliability testing, Regulatory certifications, Other
• What initial yield or failure rate would you accept during ramp to production? Options: >=99.9%, 99.0–99.8%, 95–99%, <95%, Unsure
• Do you require design registration or a manufacturer qualification step before committing to supplier pricing or allocation? Options: Yes—design registration required, Sometimes—depends on vendor, No—open to later registration, Unsure
• What lead time and allocation guarantees would make you comfortable to lock into a supplier for production? Options: <4 weeks guaranteed, 4–8 weeks with buffer, 8–16 weeks acceptable, >16 weeks acceptable, We prefer not to lock long lead times

How Do Decisions Actually Get Made Here?

• If stakeholders argued over component choice, who has final approval and why?
• What decision criteria do you weigh when selecting a part—list the top criteria and approximate importance (e.g., cost 40%, power 30%)?
• Does your organization use formal vendor scoring, lifecycle cost models, or risk matrices in supplier selection? Options: Yes—vendor scoring, TCO/lifecycle models, Risk matrix, Informal engineering preference, No formal process
• Are there contractual terms that would prevent you from choosing certain distributors or lines (exclusivity, price‑lock, long minimums)? Options: Yes—exclusivity issues, Yes—price lock concerns, Yes—minimum orders, No blocking contract terms, Unsure
• What is the simplest internal win that would get this design past procurement and into a purchase order? Options: Clear cost‑per‑unit under target, Short lead time guarantee, Production samples validated, Signed design registration, Other

If We Partnered Right Now, How Would You Measure Our Help?

• If we could prove meaningful value in one week, what concrete result would you want to see?
• Which sample deliveries would accelerate your decision most: eval kit, production‑like sample, reference board, or working firmware? Options: Evaluation kit, Production‑like sample, Reference design board, Working firmware/BSP, Other
• What timeframe do you need samples and initial test results to stay on schedule? Options: 48 hours, 1 week, 1–4 weeks, More than 4 weeks
• How will you measure whether an FAE engagement was successful (select the top outcomes)? Options: Part selected and validated, Design passes acceptance tests, Schematic lock achieved, Firmware integrated, Lead times secured
• What would make you confident enough to register the design now rather than delaying registration until after production ramp?
• Would you like us to propose a next‑step plan with owners, dates, and required sample/eval deliveries? Options: Yes—send a proposed plan, Maybe—discuss first on a call, No thanks

• Solution Experience Pre-Work & Alignment
• Prototype Intake & Baseline Validation
• Candidate Parts Validation Workshop (Hands‑on)
• Schematic Review & Reference Design Adaptation
• Validation Sign‑Off & Next Steps (Mutual Commit Prep)

• Customer engineering to review and mark any mechanical/firmware constraints within 3 business days.
• Produce side-by-side, measurable evidence showing which candidate(s) meet acceptance criteria.
• Identify necessary reference design changes and confirm eval kit fit or showstoppers.
• Elicit a clear validation signal (go/hold/fallback) from the customer for each candidate.
• FAE to export and share standardized test result packets (measurements, logs, photos) for each candidate.
• Customer to vote and record go/hold/fallback decision per candidate with rationale.
• FAE to list required reference design edits and an estimated FAE support hour budget.
• If no candidate passes, FAE to propose next experiments or alternate parts to evaluate.
• Review Chosen Candidate(s) & Rationale
• Finalize schematic change set and reference design adaptation list required for integration.
• Agree FAE deliverables, timelines, and estimated support hours for adaptation work.
• Document allocation risks and an agreed mitigation path (fallback parts, sample orders).
• FAE to deliver annotated schematic diff and reference design files within agreed SLA.
• Introductions & Objectives
• FAE to open sample requests for chosen primary and fallback parts and confirm lead times and costs.
• Record escalation contacts and a timeline for allocation risk mitigation steps.
• Summary of Evidence vs Acceptance Criteria
• Achieve formal validation sign-off or documented rejection for candidate parts based on evidence.
• Create a prioritized list of unresolved issues with owners and SLA timelines.
• Agree next milestones and ready the engagement for Mutual Commit and Deployment stages.
• FAE to produce and deliver the final evidence pack (test reports, annotated schematics, decision log).
• Customer to confirm sign-off on chosen part or record formal rejection and alternative path.
• FAE/Distributor to provide purchasing summary (costs, lead times, sample availability) for procurement handoff.
• Schedule first deployment checkpoint meeting and assign milestone owners in the shared plan.
• Crystal-clear one-sentence current state documented and agreed by all stakeholders.
• Concrete consequence statements (time/cost/risk) tied to the current state.
• Measurable future-state and acceptance criteria defined and accepted.
• All pre-work, artifacts, and logistics confirmed so the hands-on session can proceed without delays.
• Customer to upload prototype BOM, latest firmware, test vectors, and photos to shared workspace before workshop.
• Customer to deliver 1-2 representative prototype units and order of test scenarios to run.
• FAE to provision candidate parts, evaluation kits, measurement scripts, and baseline test plan.
• Schedule workshop time blocks and confirm primary/backup participants from customer and FAE teams.
• Physical & BOM Inspection
• Establish an auditable baseline dataset (power, performance, thermal) for the prototype.
• List and prioritize observed failure modes and their operational impact.
• Confirm reproducible test methods that will be used during candidate validation.
• FAE to produce and share baseline test report with raw logs and annotated photos.
• Customer to confirm any intermittent behaviors and supply additional test vectors if available.
• FAE to finalize the candidate test matrix (parts A/B/C, eval kits, and reference design variants).
• Brief Recap: Current State, Consequence, Future State
• Schematic Walkthrough & Power Sequencing
• Confirm Test Matrix & Roles
• One‑sentence Current State
• Unresolved Issues & Risk Register
• Smoke & Functional Sanity Tests
• Purchasing Inputs: Lead-times & Sample Costs
• Consequence Quantification
• Live Test: Candidate Part A vs Baseline
• Baseline Performance & Power Measurements
• Reference Design Adaptation List
• Live Test: Candidate Part B vs Baseline
• Agree Next Milestones, Owners & Dates
• Record Failure Modes & Allocation Risks
• Define Future-State Outcomes & Acceptance Criteria
• FAE Support Scope & Deliverables
• Logistics, Required Artifacts & Pre‑work
• Reference Design / Eval Kit Fit Assessment
• Confirm Measurement Methods & Acceptance Criteria
• Allocation & Risk Mitigation Plan
• Escalation & Communication Plan

• Provision evaluation kit with preloaded firmware
• Deliver reference design schematic and PCB layout
• Perform schematic review and provide redlines
• On-site or remote prototype debugging session
• Power-sequencing debug with lab measurements
• Supply production-intent samples with traceable lots
• Component cross-reference and alternate BOM
• Port and integrate MCU BSP and drivers
• Deliver thermal and power profiling data
• Assemble small-run prototypes from reference PCB
• Provide evaluation firmware examples and application notes
• Run compliance pre-test setup and deliver test data

Provision evaluation kit with preloaded firmware

• Do you want evaluation kits delivered with preloaded firmware or delivered blank? Options: Preloaded, Blank, Either / No preference
• Which firmware components should be preloaded (select all that apply)? Options: Bootloader, Demo application, Connectivity stack (BLE/Wi‑Fi), Sensor drivers, USB/serial drivers, Other (specify below)
• How many evaluation kits do you need initially? Options: 1, 2-5, 6-20, More than 20
• What is the required delivery timeline for the evaluation kits relative to your BOM deadline? Options: ASAP (<=2 weeks), 2-4 weeks, 4-8 weeks, >8 weeks
• Are there firmware licensing, NDA, or export-control constraints we should apply before loading firmware? Options: Yes, No
• Please describe any special configuration, test scripts, or acceptance checks you want preinstalled on the kits.

Deliver reference design schematic and PCB layout

• Do you require a full reference schematic and PCB layout or only schematic/package-level guidance? Options: Full schematic + PCB layout, Schematic only, Block-level guidance
• What target board constraints matter most (board size, stackup, layer count)?
• Which CAD format(s) must deliverables be provided in? Options: Altium, KiCad, OrCAD/Allegro, Eagle, Gerber only, Other
• Do you need component footprints and 3D models included? Options: Yes, No
• What timeline and review cadence do you expect for reference design delivery? Options: 1 week, 2-4 weeks, 4-8 weeks, Custom (explain below)
• Please note any manufacturing constraints or preferred design rules (DFM, impedance targets, keepouts).

Perform schematic review and provide redlines

• Will you provide a complete schematic or partial sheets for review? Options: Complete schematic, Partial schematic, High-level block only
• What level of fix recommendations do you expect (informational notes, required redlines, suggested rework)? Options: Informational notes, Recommended redlines, Required redlines & rework plan
• What is your acceptable turnaround time for a full schematic review? Options: 24-48 hours, 3-5 business days, 1-2 weeks
• Do you need annotated PDFs, native CAD redlines, or both as deliverables? Options: Annotated PDF, Native CAD redlines, Both
• Are there specific failure modes or high-risk blocks we should prioritize (power, reset, IO levels)?
• Who on your team will own the review comments and track closure (name/role)?

On-site or remote prototype debugging session

• Do you prefer an on-site visit or a remote debugging session? Options: On-site, Remote, Hybrid
• What is the primary objective of the debugging session? Options: Bring-up and boot failure, Peripherals not responding, Power sequencing issues, Performance tuning, Other (specify)
• How long should the debugging engagement be (hours/days)? Options: 2-4 hours, Half day, Full day, Multiple days (specify)
• What remote access capabilities will you provide (video, remote desktop, JTAG/serial/logs)? Options: Video + serial logs, Remote desktop access, Access to JTAG/SWD, Local-only (for on-site)
• Are there security, access, or NDA requirements for the debugging session? Options: Yes, No
• Please list expected hardware and test tools to be available during the session (scope the environment).

Power-sequencing debug with lab measurements

• Which rails or subsystems require power-sequence debugging?
• Do you need time-domain measurements, scope captures, and annotated plots delivered? Options: Yes, No
• What measurement accuracy or instrumentation constraints are required (e.g., oscilloscope bandwidth, current probe)?
• Is the debugging focused on nominal operation, cold-start, brownout, or hot-swap conditions? Options: Nominal start, Cold start, Brownout/recovery, Hot-swap
• Do you require test scripts or automation to reproduce the issue and for future regression? Options: Yes, No
• Please specify acceptance criteria or pass/fail thresholds for power behavior (voltage rise times, inrush current limits, sequencing windows).

Supply production-intent samples with traceable lots

• Do you require production-intent (authentic) samples or engineering/dev samples? Options: Production-intent, Engineering/dev, Mixed
• How many production-intent samples and which lot traceability details do you require? Options: 1-10, 11-50, 51-200, 200+
• Do you require specific date codes, country of origin, or manufacturing site traceability? Options: Yes, No
• Are there storage or handling constraints (humidity control, temperature, packaging)? Options: Yes, No
• What lead-time and delivery terms are acceptable for production-intent samples? Options: Standard lead-time, Expedite (extra cost), Custom (specify)
• Do you need certificates of conformance, material declarations, or traceability paperwork included? Options: Yes, No

Component cross-reference and alternate BOM

• Are you open to multi-vendor alternates or constrained to preferred vendors only? Options: Open to multi-vendor, Preferred vendors only, No alternates allowed
• What attributes must alternates match (package, pinout, electrical spec, cost)? Options: Package/pinout, Electrical spec/performance, Availability/lead time, Cost target, Other
• Do you need lifecycle/obsolescence risk ratings for alternates? Options: Yes, No
• How many alternate BOM options do you want evaluated per critical component? Options: 1, 2-3, 4-5, As many as needed
• Do alternates require validation testing or only a technical fit assessment? Options: Technical fit assessment only, Validation testing required, Both
• Please list any banned or ROHS/exempt materials, or vendor approvals required.

Port and integrate MCU BSP and drivers

• Which MCU family and toolchain must BSP and drivers target?
• Do you require RTOS integration or bare-metal examples? Options: RTOS (specify), Bare-metal, Both
• What deliverables are required (source code, compile instructions, binary images, CI integration)? Options: Source + build instructions, Binary images only, CI/CD integration, Documentation only
• Are there license or IP constraints for including BSP/drivers in your product? Options: Yes, No
• What timeline and handoff format do you expect for BSP integration? Options: 2 weeks, 4 weeks, 8+ weeks, Custom
• Please describe required testing or acceptance criteria for the BSP integration (peripherals validated, power modes, stress tests).

Deliver thermal and power profiling data

• Which operating modes and workloads should be profiled (idle, peak, typical use cases)? Options: Idle/standby, Typical workload, Peak/performance, All of the above
• Do you require thermal imaging, temperature vs time plots, and/or steady-state thermal maps? Options: Thermal imaging, Steady-state temperature maps, Transient temperature plots, All
• What power rails and measurement accuracy are needed (mW resolution, supply ripple specs)?
• What environmental conditions should testing cover (ambient temperature range, airflow, enclosure)?
• What format do you want the profiling deliverables in (raw data, MATLAB/CSV, annotated report)? Options: Raw data (CSV), Annotated report (PDF), Plots + raw data, Other
• Please specify any pass/fail thresholds for thermal or power metrics.

Assemble small-run prototypes from reference PCB

• How many prototype units do you need assembled? Options: 1-5, 6-20, 21-50, 50+
• Do you require purchasing/part sourcing or will you supply the BOM and parts? Options: We need sourcing, We will supply parts, Mixed
• What assembly standards and inspection levels are required (IPC class, AOI, X-ray)? Options: IPC-A-610 Class 2, IPC-A-610 Class 3, AOI required, X-ray required, Other
• Do prototypes require functional test fixtures or burn-in procedures? Options: Yes, No
• What lead-time and delivery packaging do you expect for assembled prototypes? Options: 1-2 weeks, 2-4 weeks, 4+ weeks
• Please note special handling, conformal coating, or rework instructions needed.

• Statement of Work (SOW)
• Sample & Evaluation Kit Order Agreement
• Lead-Time & Allocation Commitment
• Design Registration & Pricing Hold
• Commercial Terms & Payment Schedule
• Escalation & Allocation Risk Plan
• Acceptance Criteria & Test Sign-off
• FAE Support & Service Addendum
• Change Order & Scope Amendment Procedure
• Confidentiality & IP Use Agreement
• Shipping, Returns & Warranty Terms
• Termination, Renewal & Transfer Terms

• Design‑In Outcomes Confirmation
• Lessons Learned & Design Retrospective
• Production Readiness & Purchasing Handoff
• Open Issues Triage & Risk Mitigation Workshop

• If allocation risk remains high, trigger the agreed escalation workflow to secure supply.
• Schedule updates to the reference design repository and evaluation kit BOMs based on agreed changes.
• Plan a short FAE training session covering the identified failure modes and remediation steps.
• Add a 'design‑in checklist' item to future kickoff templates to capture allocation risk earlier.
• Approved BOM & Alternates
• Deliver a clear handoff packet (BOM, test evidence, design registration forms) that procurement can action immediately.
• Align on lead times, initial PO schedule, and contingency ordering to mitigate allocation risk.
• Define ownership and SLAs for supply escalations during the production ramp.
• Publish the handoff packet to procurement and confirm receipt and next steps.
• Submit design registration paperwork to the manufacturer(s) and track approval status.
• Create an initial PO timeline and place any recommended safety stock or NRE orders.
• Record escalation contacts and circulate the escalation flowchart to stakeholders.
• Open Issues Backlog Review
• Reduce the open issues list to a prioritized set with owners, mitigation plans, and deadlines for closure.
• Agree contingency parts and place any urgent eval kit orders to validate mitigations.
• Define verification checkpoints that, when passed, will enable procurement to proceed with confidence.
• Update the issue tracker with priorities, owners, mitigation steps, and deadlines from the workshop.
• Order identified contingency evaluation kits and schedule the required lab sessions.
• Schedule the verification checkpoints and invite necessary stakeholders for pass/fail validation.
• One‑sentence Current State
• Achieve explicit engineering sign‑off that selected parts meet acceptance criteria or list binary remaining gaps.
• Produce a definitive list of approved production parts plus alternates and any remaining open issues with owners and deadlines.
• Agree the exact artifacts to hand to purchasing (BOM, test reports, design registration, lead‑time notes).
• Finalize and publish the production BOM with part numbers, alternates, packaging, and orderable quantities.
• Upload acceptance test evidence and sign‑off form to the project folder and notify procurement.
• Assign owners and deadlines for each open technical or sourcing issue not closed in the meeting.
• Create a short exceptions log capturing known limitations or marginal cases to accompany the handoff.
• Pre‑read & Objectives
• Produce a prioritized lessons learned document with owners and timelines for each improvement.
• Ensure knowledge transfer to FAEs, product managers, and procurement so future projects avoid the same issues.
• Identify any necessary updates to reference designs or evaluation kits that remove common blockers.
• Draft and publish the lessons learned report and distribute to internal and customer stakeholders.
• Lead‑time & Allocation Risk Assessment
• Impact & Likelihood Prioritization
• Consequence Summary
• Timeline & Decision Log Review
• Cost, Design Registration, and Commercial Terms
• Evidence Review — Results & Test Data
• Mitigation Options & Contingency Parts
• What Worked / What Didn’t (Tech & Process)
• Gap & Open Issues Review
• Qualification & Acceptance Test Schedule
• Owner Commitments & Deadlines
• Root Cause & Impact Analysis
• Validation & Forced Confirmation
• Verification Checkpoints
• Improvement Backlog & Ownership
• Forecast & Initial PO Plan
• Escalation Path & SLA
• Sign‑off & Next Steps to Purchasing
• Publish & Communication Plan